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LPC3250 Developer’s Kit v2 - User’s Guide
Page 30
Copyright 2012 © Embedded Artists AB
4.17 SP9: RS422/485 Interface
There is a RS422/485 interface on the board. RS422 has individual transmit and receive pairs, while
RS485 share the same signal pair (and is hence half-duplex). By inserting both jumpers in JP9, the two
signal pairs are connected and a RS485 interface is created. By removing the jumpers in JP9 a RS422
interface is created. Via JP10 it is also possible to add termination resistors, if needed.
Direction is controlled via signal GPIO43 and is by default half-duplex (i.e., no simultaneous transmit
and receive). A high level enables the transmitter while a low level enables the receiver. It is possible
to remove R135 and R136 and control the transmitter and receiver individually via JP7 and JP8.
Note that on LPC3250, signal GPI_03 is connected to GPIO43 in the base board. This is an input
signal in the LPC3250, whereas an output signal is what is needed to control GPIO43. This is not
supported by the OEM base board, due to trade-offs when making different OEM boards and the base
board compatible. The RS422/485 interface is not directly supported for the LPC3250. Another
free GPO/GPIO pin has to be used for controlling GPIO43 and this requires re-wiring on the OEM base
board.
The interface component used (SN65HVD35) has built-in ESD protection.
See picture below for locating relevant components. The table below lists signal connections.
Figure 16 – RS422/484 Interface
Signals
LPC3250
GPIO25_RXD
U1_RX, UART#1 is used
GPIO24_TXD
U1_TX, UART#1 is used
GPIO43
GPI_03
RS422/485 part of Connector
J16
From top (pos 1)-to-bottom:
GND
TX-
TX+
RX-
RX+
RS422/485 Select
JP9
Termination Resistors Control
JP10
Transmit Control
JP7
Receive Control
JP8
- LPC3250 Developer’s Kit v2 1
- User’s Guide 1
- Embedded Artists AB 2
- Table of Contents 3
- 5 Getting Started 48 4
- 7 Troubleshooting 64 4
- 8 Further Information 66 5
- 2 Introduction 7
- 2.2 ESD Precaution 8
- 2.3 General Handling Care 9
- 2.5 CE Assessment 9
- Page 10 10
- 3 LPC3250 OEM Board Design 11
- Page 12 12
- 3.2 Memory Layout 13
- 3.3 LEDs 14
- 4 OEM Base Board Design 15
- Page 16 16
- Page 17 17
- 4.6 SP5: Debug Interfaces 18
- Page 19 19
- Page 20 20
- Page 21 21
- Page 22 22
- 4.10 SP7: I2C Peripherals 23
- 4.11 SP8: Analog Input 24
- 4.12 SP8: Digital IO 25
- Page 26 26
- Page 27 27
- Page 28 28
- 4.16 SP9: RS232 Interface 29
- Page 30 30
- 4.18 SP10: CAN 31
- 4.19 SP10: IrDA 32
- 4.20 SP11: USB Channel 1 33
- Page 34 34
- 4.21 SP12: USB Channel 2 35
- Page 36 36
- Page 37 37
- 4.23 SP13: Power Supply 38
- Page 39 39
- 4.25 SP15: I2S Audio Codec 40
- Page 41 41
- Page 42 42
- 4.27 Usage of CPU Pins 43
- Page 44 44
- Page 45 45
- Page 46 46
- Page 47 47
- 5 Getting Started 48
- Page 49 49
- 5.4 Booting 50
- 5.4.1 Kickstart Loader 51
- 5.4.2 Stage 1 Loader 51
- Page 52 52
- Page 53 53
- Page 54 54
- 5.4.3 Service Boot 55
- Page 56 56
- Page 57 57
- 5.6 Things to Note 58
- 5.6.2 NAND FLASH Bad Block 58
- 5.6.4 LPC3250 Peripherals 59
- 5.6.6 LCD flickering 59
- 5.6.8 USB OTG Transceiver 60
- 6 LCD Expansion Connector 61
- Page 62 62
- Page 63 63
- 7 Troubleshooting 64
- Page 65 65
- 8 Further Information 66
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